Dr.-Ing. Andreas Zwinkau

Kontakt

IPD Prof. Snelting

Raum 030, Gebäude 50.34

Am Fasanengarten 5

76131 Karlsruhe

Deutschland

Sprechzeiten: no

Compiler, Sprachdesign, Verteiltes und nebenläufiges Rechnen, Graphtransformation

An X10 Memory Model
Proceedings of the sixth ACM SIGPLAN X10 Workshop June 2016 : A. Zwinkau
Invasive Computing for Timing-Predictable Stream Processing on MPSOCS
it -- Information Technology 2016, pp. 267--280 : S. Wildermann, M. Bader, L. Bauer, M. Damschen, D. Gabriel, M. Gerndt, M. Glaß, J. Henkel, J. Paul, A. Pöppl, S. Roloff, T. Schwarzer, G. Snelting, W. S. a

Adaptive fault tolerance through invasive computing
Adaptive Hardware and Systems (AHS), 2015 NASA/ESA Conference on June 2015, pp. 1-8 : M. Witterauf, A. Tanase, J. Teich, V. Lari, A. Zwinkau, G. Snelting
Cutting Out the Middleman: OS-Level Support for X10 Activities
Proceedings of the fifth ACM SIGPLAN X10 Workshop 2015, pp. 13--18 : M. Mohr, S. Buchwald, A. Zwinkau, C. Erhardt, B. Oechslein, J. Schedel, D. Lohmann
Malleable Invasive Applications
Proceedings of the 8th Working Conference on Programming Languages (ATPS'15) 2015 (ATPS 2015) : S. Buchwald, M. Mohr, A. Zwinkau

CAP: Communication Aware Programming
Design Automation Conference (DAC), 2014 51th ACM / EDAC / IEEE 2014 : J. Heisswolf, A. Zaib, A. Zwinkau, S. Kobbe, A. Weichslgartner, J. Teich, J. Henkel, G. Snelting, A. Herkersdorf, J. Becker
Dynamic X10: Resource-Aware Programming for Higher Efficiency
Karlsruhe Reports in Informatics 2014 : M. Braun, S. Buchwald, M. Mohr, A. Zwinkau

Invasive computing in HPC with X10
Proceedings of the third ACM SIGPLAN X10 Workshop 2013, pp. 12--19 : H. Bungartz, C. Riesinger, M. Schreiber, G. Snelting, A. Zwinkau
Simple and Efficient Construction of Static Single Assignment Form
Compiler Construction 2013, pp. 102--122 (CC 2013) : M. Braun, S. Buchwald, S. Hack, R. Leißa, C. Mallon, A. Zwinkau
InvadeX10 Documentation v0.5
Karlsruhe Reports in Informatics 2013 : A. Zwinkau, S. Buchwald, G. Snelting

Resource-aware programming and simulation of MPSoC architectures through extension of X10
Proceedings of the 14th International Workshop on Software and Compilers for Embedded Systems June 2011, pp. 48--55 (SCOPES 2011) : F. Hannig, S. Roloff, G. Snelting, J. Teich, A. Zwinkau
SSA-Based Register Allocation with PBQP
Compiler Construction 2011, pp. 42--61 (CC '11) : S. Buchwald, A. Zwinkau, T. Bersch
Firm---A Graph-Based Intermediate Representation
Karlsruhe Reports in Informatics 2011 : M. Braun, S. Buchwald, A. Zwinkau

Instruction Selection by Graph Transformation
Proceedings of the 2010 international conference on Compilers, architectures and synthesis for embedded systems October 2010, pp. 31--40 (CASES '10) : S. Buchwald, A. Zwinkau