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I want a backend X, how hard would it be to create one for libFirm?

In our experience starting with a new backend is quite easy. We provide the TEMPLATE backend as a starting point and the sparc and arm backends should be easy enough to understand. How complex the backend becomes in the end heavily depends on how irregular the architecture is, how complicated are the address modi, do the address modi of different instructions behave differently, how complicated are the calling conventions, so far each architecture had its own set of features which make writing a backend a little challenge, these problems are there for every compiler, you just have to deal with them with custom code. Some examples of what We have seen before:

  • On sparc you always have to leave 92 bytes of stack space reserved between the stack pointer and the stuff you actually put on the stack.

  • Sparc/Arm calling conventions pass floating point values in integere registers by default

  • x86 fpu code uses a stack and not registers

  • sparc needs custom logic to fill in delay slots which are somewhat tricky in terms of data dependencies

  • arm immediates are quite limited and require strange hacks if your spill area or function exceeds the immediate limit (about 1024)

Anyway apart from such unforseen problems writing a backend is quite easy:

  • Create a specification of architecture specific firm nodes. Usually 1 node per target machine instruction. Specify the register requirements.

  • Create a code selection pass: This pass matches patterns in the firm graph and replaces them with architecture specific nodes.

  • Create some callbacks to allow spill, reload creation, handling of calling conventions

  • Register allocation and spillslot management can be left to the generic backend infrastructure

  • Create emitter code which emits assembly based on the machine specific nodes

We’d be happy to assist you and provide you with more details.