path: root/ir/be/mips
Commit message (Collapse)AuthorAge
* beasm: Tell the backends how to handle the fallthrough exec output of be_Asm.Christoph Mallon2019-04-05
* beasm: Handle operand modifier 'l' in all backends.Christoph Mallon2019-04-05
* beasm: Add BE_ASM_OPERAND_LABEL and tell the backends how to emit it.Christoph Mallon2019-04-05
* beasm: Factor out common code to add an immediate operand.Christoph Mallon2019-03-06
* Remove duplicate calls to be_set_asm_operand().Christoph Mallon2019-03-06
| | | | The callers of these functions do it, too.
* beasm: Support modifier 'c' (plain immediate) in all remaining backends.Christoph Mallon2019-03-06
| | | | These backends do not have a prefix for immediates anyway, so besides accepting the modifier there is nothing to do.
* fix mips and riscv function alignmentJohannes Bucher2019-03-06
* be: Factor out code to emit an unconditional jump in each backend.Christoph Mallon2019-03-04
* lower_dw: Lower Add and Sub to simple operations instead of using a library ↵Christoph Mallon2018-08-14
| | | | | | | | call. So far no names for the functions were provided and neither libgcc nor ARM aeabi have any. This uses the implementation from the MIPS backend.
* amd64, mips, template: Mark nodes as fallthrough.Christoph Mallon2018-05-31
* be: Factor out code to decide whether a basic block needs a label.Christoph Mallon2018-05-31
| | | | For this a new flag 'arch_irn_flag_fallthrough' is introduced to mark nodes which are capable of falling through to their successor.
* mips: Handle 2-address code.Christoph Mallon2018-05-18
| | | | | | This currently can only happen with inline assembler. This fixes backend/asm_matching.constraint.c.
* ir: Overhaul representation of ASM constraints in the IR.Christoph Mallon2018-05-11
| | | | | | | | | | Now the constraints are a mapping from the template position to the input/output positions instead of the other way round. Also there is only one list of constraints instead of a separate one for input and output. This simplifies handling quite a bit, in particular the numbering. E.g. "=m" actually is an input (for the address) and this caused miscounting when the constraints were processed. Also processing of 64 bit operands also lead to miscounting. This fixes x86code/asm_test15.c and x86code/asm_test19.c
* be: Factor out code to add an output to an asm node.Christoph Mallon2018-05-09
* be: Factor out code to add an input to an asm node.Christoph Mallon2018-05-09
* be: Factor out code to prepare information collection for an asm node.Christoph Mallon2018-05-09
* be: Use a common struct to hold basic asm operand information.Christoph Mallon2018-05-08
* lower_dw: Do not pass the high mode as parameter to the lowering functions.Christoph Mallon2018-05-08
| | | | Provide a function to get the high mode instead.
* mips: Add '$' as architecture-specific register name prefix.Christoph Mallon2018-05-05
| | | | This fixes backend/asm_clobber_prefix.c on mips.
* arm, mips, sparc: Handle clobbers in asm.Christoph Mallon2018-05-04
* be: Factor out parsing of register names for clobbers.Christoph Mallon2018-05-04
* lower: Handle creation of the libgcc entities directly in the double word ↵Christoph Mallon2018-04-08
| | | | | | | | | | | lowerer. Before each backend specified the same names (or a subset thereof) by itself. Now also backends without explicit handling for several double word operations just use the libgcc functions. This re-uses the implementation of the SPARC backend, because it handled a superset of all others. Additionally the arm backend did not mangle the name. This was not critical because typical arm systems have no mangling.
* mips: Correctly handle twice returning calls (setjmp).Christoph Mallon2018-04-03
* mips: Replace magic number '4' by a symbolic constant (number of GP register ↵Christoph Mallon2018-03-23
| | | | parameters).
* be: Remove redundant "uses_memory".Christoph Mallon2018-03-06
* be: Automatically use be_info_init_irn().Christoph Mallon2018-02-28
| | | | So far each backend had to call it manually.
* be: Turn the specification of each register class into a map.Christoph Mallon2018-02-26
| | | | | So far the mode and flags were in the last magic entry in each register class. Now they are entries in the map and the list of registers is also an entry.
* be: Remove the redundant parameter 'sp' from be_new_IncSP().Christoph Mallon2018-02-26
| | | | | It only needs the register class, not the specific stack pointer register. So simply get the register class from the parameter 'old_sp'.
* Implement a new, callback-based, lowering for calls with compounds.Andreas Fried2017-12-13
| | | | | | | | | | The difference between ABIs is so large that we cannot distingush between them with flags. Basically, we would have to implement all ABIs in lower_calls.c. Instead, we let the backends specify how parameter and result types are to be lowered. For now, all backends except IA-32 use a dummy ABI, which is the old Firm default, i.e. the SPARC ABI.
* arm, mips, sparc: Set 'highest_shift_amount' to 63.Christoph Mallon2017-03-17
| | | | All these backends can deal with 64 bit shifts by amounts >= 32, because after 64 bit lowering they are just normal shifts with amount < 32.
* mips, arm: Disable all if conversion againMatthias Braun2017-02-20
| | | | | | | The previous commit would enable if conversion that do not produce Mux nodes by default for all targets. Seems the mips, arm target cannot handle all resulting nodes yet (Shifts != wordsize for example), so go back to no if conversion.
* Rework target initialization and queryMatthias Braun2017-02-20
| | | | | | | | | | | | | | | | | | | | | | | | | | - Moves machine triple handling code form cparser into libfirm - Create new APIs to set the target and query information about it - Move backend_params into the new target API - Backends initialize ir_target instead of backend_params now - Add new API to get information about the target platform: - Mangle a name for the target platform (and remove compilerlib mangling callback) - Can query size and alignment of basic C types for the platform - Move some constant target information into arch_isa_if_t (we move it to target_info_t later when we realize it needs to be dynamic) - Redo backend initialization. Examples: Simple case: Initialize for host: ir_init(); Complex case: cross-compile to sparc with PIC enabled: ir_init_library(); ir_target_set("sparc-leon-linux-gnu"); ir_target_option("pic"); ir_target_init();
* Reorganize include directivesMatthias Braun2017-02-17
* mips: Need to set replace_xxx in irarch nowMatthias Braun2017-01-29
| | | | Hopefully this fixes the fallout from acf1a376620890041b2a637a79a46da6700012d6
* irarch: Leave setup to backendsMatthias Braun2017-01-28
| | | | | | Let backends perform the irarch setup in lower_for_target(). Frontends do not need to explicitely enable it any longer and there is no need to keep the settings around in backend_params.
* Reorganize va_arg handlingMatthias Braun2017-01-28
| | | | | | Do not put stuff unnecessarily into backend params. - Pass lower_va_arg directly as a parameter to lower_builtins - Pass stack_param align directly to be_default_lower_va_arg
* lower_dw: Use be_is_big_endian()Matthias Braun2017-01-28
| | | | No need to pass around a custom field.
* Fix duplicate const warningMatthias Braun2017-01-28
* mips: Handle Call arguments, which need to be sign/zero extended.Christoph Mallon2017-01-25
* mips: Perform builtin lowering.Christoph Mallon2017-01-24
* mips: Avoid unnecessary sign/zero extension right after Load.Christoph Mallon2017-01-22
* mips: Handle Cmp with 8 and 16 bits.Christoph Mallon2017-01-22
* mips: Factor out code to sign/zero extend values.Christoph Mallon2017-01-22
* mips: Fix typo in function name.Christoph Mallon2017-01-22
* mips: Use the macro TODO.Christoph Mallon2017-01-22
* mips: Handle compound return values.Christoph Mallon2017-01-16
* mips: Show a nicer panic instead of a segfault for the unhandled struct ↵Christoph Mallon2017-01-14
| | | | parameters and returns.
* mips: Handle unordered relations in non-float Cmp.Christoph Mallon2017-01-14
| | | | They can happen at -O0.
* mips: Lower CopyB.Christoph Mallon2017-01-14
* mips: Improve matching of addresses.Christoph Mallon2017-01-14
| | | | Fold small constant offsets.