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* ilp: Fix some edge cases.Andreas Fried2021-11-19
* Silence some newer GCC warnings.Andreas Fried2021-10-29
* riscv: Call ir_lower_mode_b during target lowering.Andreas Fried2021-08-03
* Rename register FP to S0.Andreas Fried2021-04-06
* x86: add modern architecture variants and improve cpu detectionamd64-fmaJohannes Bucher2021-03-22
* ia32/amd64: split up architecture variant and cpu features into different bit...Johannes Bucher2021-03-22
* add basic cpu architecture autodetection for amd64Johannes Bucher2021-03-22
* amd64: support scalar fused-multiply-add instructions (FMA3)Johannes Bucher2021-03-22
* be2addr: fix copy-after case for modes with mode_TJohannes Bucher2021-03-22
* Recognize AArch64 as host cpu type.Manuel Mohr2021-03-04
* amd64: add pxor_0 instruction before cvtsi2sd to break dependency chainJohannes Bucher2020-02-21
* amd64: peephole: remove consecutive zero extensionsJohannes Bucher2020-02-21
* default to -fPIC on OpenBSDJohannes Bucher2019-12-06
* riscv: support soft-float and the -march and -mabi switchesJohannes Bucher2019-11-29
* riscv: correctly lower aggregate parametersJohannes Bucher2019-11-08
* riscv: lowering of builtin va_arg takes alignment rules into accountJohannes Bucher2019-11-08
* Fix handling of array-typed struct members in AMD64 ABI.Andreas Fried2019-11-08
* riscv: simplify frame pointer relative addressingJohannes Bucher2019-10-25
* riscv: add support for variadic functionsJohannes Bucher2019-10-24
* Set immediate kind for ia32_FldCWSebastian Buchwald2019-08-09
* riscv: add missing dump after lower_callsJohannes Bucher2019-06-25
* riscv: lower aggregate types at calls by replacing them with a pointer to the...Johannes Bucher2019-06-19
* riscv: add emit function for be_MemPerm nodesJohannes Bucher2019-06-19
* riscv: add a peephole optimization for consecutive shift operationsJohannes Bucher2019-06-19
* riscv: support right shift for modes smaller than 32 bitJohannes Bucher2019-06-11
* riscv: rename register s0 -> fpJohannes Bucher2019-06-11
* riscv: fix function prologue + epilogueJohannes Bucher2019-06-11
* riscv: support frame pointer relative addressingJohannes Bucher2019-06-11
* riscv: support Alloc nodesJohannes Bucher2019-06-11
* riscv: support extension from mode Hu (16 bit) to machine sizeJohannes Bucher2019-05-17
* riscv: do not emit IncSP nodes with offset 0Johannes Bucher2019-05-17
* riscv: fix calculation of hi lo immediate (remove undefined behavior)Johannes Bucher2019-05-17
* ir: Allow ASM nodes as control flow nodes.Christoph Mallon2019-04-05
* beasm: Allow be_Asm nodes as control flow nodes.Christoph Mallon2019-04-05
* beasm: Give label constraints the "register" class 'exec'.Christoph Mallon2019-04-05
* beasm: Do not confuse the additional register pressure handling with exec out...Christoph Mallon2019-04-05
* beasm: Tell the backends how to handle the fallthrough exec output of be_Asm.Christoph Mallon2019-04-05
* be, ir: Give be_Asm and ASM a fallthrough exec output.Christoph Mallon2019-04-05
* beasm: Handle operand modifier 'l' in all backends.Christoph Mallon2019-04-05
* beasm: Add BE_ASM_OPERAND_LABEL and tell the backends how to emit it.Christoph Mallon2019-04-05
* api: Pass ir_cons_flags to new_*_ASM(), so the pin state is set atomically.Christoph Mallon2019-04-05
* api: Pass the asm text before the constraints and clobbers to new_*_ASM().Christoph Mallon2019-04-05
* be: Dump the text template of be_Asm.Christoph Mallon2019-04-01
* be: A block needs no label, if it is only reachable by fallthrough from a reg...Christoph Mallon2019-03-31
* amd64: Also determine the frame offset for memory operands of be_Asm.Christoph Mallon2019-03-31
* amd64: Factor out code to determine the frame offset for an x86_addr_t.Christoph Mallon2019-03-31
* ia32: Also determine the frame offset for memory operands of be_Asm.Christoph Mallon2019-03-31
* ia32: Factor out code to determine the frame offset for an x86_addr_t.Christoph Mallon2019-03-31
* ia32: Set {base,index,mem}_input directly in init_ia32_attributes().Christoph Mallon2019-03-31
* ia32: Remove the enum constant 'IA32_ATTR_ia32_asm_attr_t'.Christoph Mallon2019-03-31