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authorChristoph Mallon <christoph.mallon@gmx.de>2018-03-31 12:12:43 +0200
committerChristoph Mallon <christoph.mallon@gmx.de>2018-08-15 12:05:18 +0200
commitb031096c75829e287eb18942542ebcd4c6daa8a9 (patch)
tree5e27a38e506a6c4cfe3ff3e3f0513fb79866b36f /ir/be/platform.c
parentd87cbba82fd6596a233f3bf2910d1eaa80f23bb5 (diff)
riscv: Implement a basic RISC-V 32 backend.
Diffstat (limited to 'ir/be/platform.c')
-rw-r--r--ir/be/platform.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/ir/be/platform.c b/ir/be/platform.c
index badc54c..70a72ee 100644
--- a/ir/be/platform.c
+++ b/ir/be/platform.c
@@ -147,6 +147,14 @@ void ir_platform_set(ir_machine_triple_t const *machine,
ppdef1("__mips__");
ir_platform.long_double_size = 8;
ir_platform.long_double_align = 8;
+ } else if (streq(cpu, "riscv32")) {
+ ppdef1("__riscv");
+ ppdef1("__riscv_div");
+ ppdef1("__riscv_mul");
+ ppdef1("__riscv_muldiv");
+ ppdef("__riscv_xlen", "32");
+ ir_platform.long_double_size = 16;
+ ir_platform.long_double_align = 16;
} else if (streq(cpu, "TEMPLATE")) {
ir_platform.long_double_size = 8;
ir_platform.long_double_align = 8;