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authorChristoph Mallon <christoph.mallon@gmx.de>2018-02-28 09:19:29 +0100
committerChristoph Mallon <christoph.mallon@gmx.de>2018-02-28 09:35:32 +0100
commit96230762262e9511d53ffddb4fdea43163059e4e (patch)
treec4fe61b0bd4117d1180128d85e9d86e4cfd128cd /ir/be/amd64
parent07b3271fa8a64862d23fb8427d92cf8d39f948c3 (diff)
amd64: Do not unnecessarily restrict flags requirements to the single register.
Simply use the whole register class 'flags', which just contains the single register 'eflags'. Now all instructions consistently use 'flags'.
Diffstat (limited to 'ir/be/amd64')
-rw-r--r--ir/be/amd64/amd64_emitter.c2
-rw-r--r--ir/be/amd64/amd64_spec.pl8
2 files changed, 5 insertions, 5 deletions
diff --git a/ir/be/amd64/amd64_emitter.c b/ir/be/amd64/amd64_emitter.c
index fb510f2..0284fe7 100644
--- a/ir/be/amd64/amd64_emitter.c
+++ b/ir/be/amd64/amd64_emitter.c
@@ -636,7 +636,7 @@ static x86_condition_code_t determine_final_cc(ir_node const *const flags,
*/
static void emit_amd64_jcc(const ir_node *irn)
{
- const ir_node *flags = get_irn_n(irn, n_amd64_jcc_eflags);
+ const ir_node *flags = get_irn_n(irn, n_amd64_jcc_flags);
const amd64_cc_attr_t *attr = get_amd64_cc_attr_const(irn);
x86_condition_code_t cc = determine_final_cc(flags, attr->cc);
diff --git a/ir/be/amd64/amd64_spec.pl b/ir/be/amd64/amd64_spec.pl
index 56c3c41..5c5bfc4 100644
--- a/ir/be/amd64/amd64_spec.pl
+++ b/ir/be/amd64/amd64_spec.pl
@@ -484,9 +484,9 @@ cmpxchg => {
# TODO Setcc can also operate on memory
setcc => {
irn_flags => [ ],
- in_reqs => [ "eflags" ],
+ in_reqs => [ "flags" ],
out_reqs => [ "gp" ],
- ins => [ "eflags" ],
+ ins => [ "flags" ],
outs => [ "res" ],
attr_type => "amd64_cc_attr_t",
attr => "x86_condition_code_t cc",
@@ -508,9 +508,9 @@ lea => {
jcc => {
state => "pinned",
op_flags => [ "cfopcode", "forking" ],
- in_reqs => [ "eflags" ],
+ in_reqs => [ "flags" ],
out_reqs => [ "exec", "exec" ],
- ins => [ "eflags" ],
+ ins => [ "flags" ],
outs => [ "false", "true" ],
attr_type => "amd64_cc_attr_t",
attr => "x86_condition_code_t cc",