diff options
author | Andreas Fried <andreas.fried@kit.edu> | 2021-04-01 15:33:21 +0200 |
---|---|---|
committer | Andreas Fried <andreas.fried@kit.edu> | 2021-04-06 15:33:42 +0200 |
commit | 6dfeab4016d89fb2546d7772d52b84facdcb0f7b (patch) | |
tree | 42ca9aac28f163edf272d59407e62c7f973fa8b1 | |
parent | fa10c7c7db0b1d57220a0d55fe8bbecce751f794 (diff) |
Rename register FP to S0.
S0 is the name preferred by GNU tools, and the only name accepted by the
bare-metal assembler (riscv{32,64}-unknown-elf-as). This gives us less
descriptive register names, but more portability.
-rw-r--r-- | ir/be/riscv/riscv_bearch.c | 10 | ||||
-rw-r--r-- | ir/be/riscv/riscv_cconv.c | 2 | ||||
-rw-r--r-- | ir/be/riscv/riscv_spec.pl | 2 | ||||
-rw-r--r-- | ir/be/riscv/riscv_transform.c | 6 |
4 files changed, 10 insertions, 10 deletions
diff --git a/ir/be/riscv/riscv_bearch.c b/ir/be/riscv/riscv_bearch.c index 9103c66..af2be01 100644 --- a/ir/be/riscv/riscv_bearch.c +++ b/ir/be/riscv/riscv_bearch.c @@ -237,7 +237,7 @@ static void riscv_introduce_prologue(ir_graph *const irg, unsigned size, bool om ir_node *const start = get_irg_start(irg); ir_node *const block = get_nodes_block(start); ir_node *const start_sp = be_get_Start_proj(irg, &riscv_registers[REG_SP]); - ir_node *const start_fp = be_get_Start_proj(irg, &riscv_registers[REG_FP]); + ir_node *const start_fp = be_get_Start_proj(irg, &riscv_registers[REG_S0]); if (!omit_fp) { ir_node *const mem = get_irg_initial_mem(irg); @@ -278,7 +278,7 @@ static void riscv_introduce_prologue(ir_graph *const irg, unsigned size, bool om /* set current fp */ ir_node *const curr_fp = be_new_Copy(block, add); - arch_set_irn_register(curr_fp, &riscv_registers[REG_FP]); + arch_set_irn_register(curr_fp, &riscv_registers[REG_S0]); sched_add_after(store_fp, curr_fp); edges_reroute_except(start_fp, curr_fp, store_fp); } else { @@ -291,7 +291,7 @@ static void riscv_introduce_prologue(ir_graph *const irg, unsigned size, bool om ir_node *const curr_fp = new_bd_riscv_addi(NULL, block, inc_sp, NULL, aligned); sched_add_after(store_fp, curr_fp); edges_reroute_except(start_fp, curr_fp, store_fp); - arch_set_irn_register(curr_fp, &riscv_registers[REG_FP]); + arch_set_irn_register(curr_fp, &riscv_registers[REG_S0]); } be_keep_if_unused(inc_sp); @@ -306,7 +306,7 @@ static void riscv_introduce_epilogue(ir_node *const ret, unsigned const size, bo { ir_node *const block = get_nodes_block(ret); if (!omit_fp) { - int const n_fp = be_get_input_pos_for_req(ret, &riscv_single_reg_req_gp_fp); + int const n_fp = be_get_input_pos_for_req(ret, &riscv_single_reg_req_gp_s0); ir_node *curr_fp = get_irn_n(ret, n_fp); ir_node *curr_mem = get_irn_n(ret, n_riscv_ret_mem); @@ -324,7 +324,7 @@ static void riscv_introduce_epilogue(ir_node *const ret, unsigned const size, bo /* set fp to old fp */ ir_node *const restored_fp = be_new_Copy(block, old_fp); - arch_set_irn_register(restored_fp, &riscv_registers[REG_FP]); + arch_set_irn_register(restored_fp, &riscv_registers[REG_S0]); sched_add_before(ret, restored_fp); set_irn_n(ret, n_fp, restored_fp); diff --git a/ir/be/riscv/riscv_cconv.c b/ir/be/riscv/riscv_cconv.c index 3b5e8ab..23a3885 100644 --- a/ir/be/riscv/riscv_cconv.c +++ b/ir/be/riscv/riscv_cconv.c @@ -114,7 +114,7 @@ void riscv_determine_calling_convention(riscv_calling_convention_t *const cconv, if (irg != NULL) { be_irg_t *birg = be_birg_from_irg(irg); if (!omit_fp) - rbitset_clear(birg->allocatable_regs, REG_FP); + rbitset_clear(birg->allocatable_regs, REG_S0); } cconv->omit_fp = omit_fp; } diff --git a/ir/be/riscv/riscv_spec.pl b/ir/be/riscv/riscv_spec.pl index 6e1a92b..1a0ff7d 100644 --- a/ir/be/riscv/riscv_spec.pl +++ b/ir/be/riscv/riscv_spec.pl @@ -17,7 +17,7 @@ my $mode_gp = "mode_Iu"; { name => "t0", encoding => 5 }, { name => "t1", encoding => 6 }, { name => "t2", encoding => 7 }, - { name => "fp", encoding => 8 }, + { name => "s0", encoding => 8 }, { name => "s1", encoding => 9 }, { name => "a0", encoding => 10 }, { name => "a1", encoding => 11 }, diff --git a/ir/be/riscv/riscv_transform.c b/ir/be/riscv/riscv_transform.c index 047a9d9..e4a4a6e 100644 --- a/ir/be/riscv/riscv_transform.c +++ b/ir/be/riscv/riscv_transform.c @@ -39,7 +39,7 @@ static unsigned const regs_param_gp[] = { static ir_node *initial_va_list; static unsigned const callee_saves[] = { - REG_FP, + REG_S0, REG_S1, REG_S2, REG_S3, @@ -78,7 +78,7 @@ static ir_node *get_Start_sp(ir_graph *const irg) static ir_node *get_Start_fp(ir_graph *const irg) { - return be_get_Start_proj(irg, &riscv_registers[REG_FP]); + return be_get_Start_proj(irg, &riscv_registers[REG_S0]); } ir_node *get_Start_zero(ir_graph *const irg) @@ -1145,7 +1145,7 @@ static ir_node *gen_Start(ir_node *const node) outs[reg->global_index] = BE_START_REG; } if (!cur_cconv.omit_fp) - outs[REG_FP] = BE_START_IGNORE; + outs[REG_S0] = BE_START_IGNORE; return be_new_Start(irg, outs); } |