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authorJohannes Bucher <johannes.bucher2@student.kit.edu>2019-10-25 11:52:32 +0200
committerJohannes Bucher <johannes.bucher2@student.kit.edu>2019-10-25 11:52:32 +0200
commita4672cceb5a83407ba9a70a9b7b613006034073e (patch)
treee2112053b0918af85d9bd8f603cbe72be4a39e07
parentc5b9af12a94c49c01ff38c44f7c75939165f3ff3 (diff)
riscv: simplify frame pointer relative addressing
Make use of the 'begin' parameter of be_layout_frame_types instead of fixing the offsets manually using a backend node flag.
-rw-r--r--ir/be/riscv/riscv_bearch.c8
-rw-r--r--ir/be/riscv/riscv_nodes_attr.h4
-rw-r--r--ir/be/riscv/riscv_transform.c6
3 files changed, 3 insertions, 15 deletions
diff --git a/ir/be/riscv/riscv_bearch.c b/ir/be/riscv/riscv_bearch.c
index cb8fed8..92f5432 100644
--- a/ir/be/riscv/riscv_bearch.c
+++ b/ir/be/riscv/riscv_bearch.c
@@ -322,8 +322,6 @@ static void riscv_sp_sim(ir_node *const node, stack_pointer_state_t *const state
ir_graph *irg = get_irn_irg(node);
if (riscv_get_irg_data(irg)->omit_fp) {
be_set_MemPerm_offset(node, state->offset);
- } else {
- be_set_MemPerm_offset(node, -RISCV_REGISTER_SIZE);
}
return;
}
@@ -346,9 +344,6 @@ static void riscv_sp_sim(ir_node *const node, stack_pointer_state_t *const state
ir_graph *const irg = get_irn_irg(node);
if (riscv_get_irg_data(irg)->omit_fp) {
imm->val += state->offset;
- } else if (!(arch_get_irn_flags(node) & (arch_irn_flags_t)riscv_arch_irn_flag_ignore_fp_offset_fix)) {
- // consider additional slot for saved frame pointer
- imm->val -= RISCV_REGISTER_SIZE;
}
imm->val += get_entity_offset(ent);
}
@@ -393,7 +388,10 @@ static void riscv_generate_code(FILE *const output, char const *const cup_name)
be_sort_frame_entities(frame, omit_fp);
ir_entity *const fun_ent = get_irg_entity(irg);
ir_type *fun_type = get_entity_type(fun_ent);
+ // variadic functions copy the register arguments to the vararg save area on the stack
int begin = is_method_variadic(fun_type) ? -(RISCV_REGISTER_SIZE * RISCV_N_PARAM_REGS) : 0;
+ // slot for saved frame pointer
+ begin -= omit_fp ? 0 : RISCV_REGISTER_SIZE;
be_layout_frame_type(frame, begin, 0);
riscv_introduce_prologue_epilogue(irg, omit_fp);
diff --git a/ir/be/riscv/riscv_nodes_attr.h b/ir/be/riscv/riscv_nodes_attr.h
index 794635e..931aba8 100644
--- a/ir/be/riscv/riscv_nodes_attr.h
+++ b/ir/be/riscv/riscv_nodes_attr.h
@@ -14,10 +14,6 @@ typedef struct riscv_attr_t {
except_attr exc; /**< the exception attribute. MUST be the first one. */
} riscv_attr_t;
-enum riscv_arch_irn_flags_t {
- riscv_arch_irn_flag_ignore_fp_offset_fix = arch_irn_flag_backend << 0,
-};
-
typedef enum riscv_cond_t {
/* Flipping the lowest bit negates the condition. */
riscv_cc_eq,
diff --git a/ir/be/riscv/riscv_transform.c b/ir/be/riscv/riscv_transform.c
index 8ef9a15..047a9d9 100644
--- a/ir/be/riscv/riscv_transform.c
+++ b/ir/be/riscv/riscv_transform.c
@@ -399,7 +399,6 @@ static ir_node *gen_va_start(ir_node *node)
ir_entity *entity = cur_cconv.va_start_addr;
ir_node *frame = cur_cconv.omit_fp ? get_Start_sp(irg): get_Start_fp(irg);
ir_node *ap = new_bd_riscv_FrameAddr(dbgi, block, frame, entity, 0);
- arch_add_irn_flags(ap, (arch_irn_flags_t)riscv_arch_irn_flag_ignore_fp_offset_fix);
initial_va_list = ap;
}
return initial_va_list;
@@ -982,7 +981,6 @@ static ir_node *gen_Proj_Proj_Start(ir_node *const node)
ir_node *const mem = be_get_Start_mem(irg);
ir_node *const base = cur_cconv.omit_fp ? get_Start_sp(irg) : get_Start_fp(irg);
ir_node *const load = new_bd_riscv_lw(dbgi, block, mem, base, param->entity, 0);
- arch_add_irn_flags(load, (arch_irn_flags_t)riscv_arch_irn_flag_ignore_fp_offset_fix);
return be_new_Proj(load, pn_riscv_lw_res);
}
}
@@ -1178,10 +1176,6 @@ static ir_node *gen_Store(ir_node *const node)
riscv_addr const addr = make_addr(get_Store_ptr(node));
ir_node *const store = cons(dbgi, block, mem, addr.base, val, addr.ent, addr.val);
- if (addr.ent && is_parameter_entity(addr.ent) ) {
- arch_add_irn_flags(store, (arch_irn_flags_t)riscv_arch_irn_flag_ignore_fp_offset_fix);
- }
-
return store;
}
TODO(node);